R. Houle

A 64 Mb SRAM in 32 nm High-k Metal-Gate SOI Technology With 0.7 V Operation Enabled by Stability, Write-Ability and Read-Ability Enhancements

Harold Pilo, Igor Arsovski, Kevin Batson et al. · IEEE Journal of Solid-State Circuits · 2011 · 79 citations

Non-volatile Memory, Engineering, Vlsi Design +19

A 480-MHz RISC microprocessor in a 0.12-μm L/sub eff/ CMOS technology with copper interconnects

C. Akrout, Jörg Bialas, M. Canada et al. · IEEE Journal of Solid-State Circuits · 1998 · 65 citations

Engineering, Vlsi Design, Computer Architecture +16

6.6+ GHz Low Vmin, read and half select disturb-free 1.2 Mb SRAM

R. Houle, Kevin Batson, D. Rodko et al. · 2007 · 59 citations

Low-power Electronics, Electrical Engineering, Ghz Low Vmin +12

A 580 MHz RISC microprocessor in SOI

M. Canada, C. Akrout, D. Cawthron et al. · 2003 · 44 citations

Hardware Security, System On Chip, Electrical Engineering +14

A 64Mb SRAM in 32nm High-k metal-gate SOI technology with 0.7V operation enabled by stability, write-ability and read-ability enhancements

Harold Pilo, Igor Arsovski, Kevin Batson et al. · 2011 · 43 citations

Non-volatile Memory, Electrical Engineering, Bc Area +13