W. Noble

A variable-stress shallow trench isolation (STL) technology with diffused sidewall doping for submicron CMOS

B. Davari, Charles W. Koburger, T. Furukawa et al. · 2003 · 57 citations

Engineering, Computer Engineering, Electrical Engineering +17

A substrate-plate trench-capacitor (SPT) memory cell for dynamic RAM's

Nicky Lu, P.E. Cottrell, Winston J. Craig et al. · IEEE Journal of Solid-State Circuits · 1986 · 55 citations

Engineering, Computer Engineering, Electrical Engineering +17

The evolution of IBM CMOS DRAM technology

E.L. Adler, J. DeBrosse, Steven J. Holmes et al. · IBM Journal of Research and Development · 1995 · 51 citations

Engineering, Computer Engineering, Electrical Engineering +17

A model for anomalous short-channel behavior in submicron MOSFETs

H.I. Hanafi, W. Noble, Roy S. Bass et al. · IEEE Electron Device Letters · 1993 · 45 citations

Engineering, Electrical Engineering, Microelectronics +16

The effects of gate field on the leakage characteristics of heavily doped junctions

W. Noble, Steven H. Voldman, A. Bryant · IEEE Transactions on Electron Devices · 1989 · 37 citations

Engineering, Electrical Engineering, Microelectronics +16