S. Natarajan

Impact of negative bias temperature instability on digital circuit reliability

V. Reddy, A.T. Krishnan, Andrew Marshall et al. · 2003 · 229 citations

Engineering, Computer Engineering, Electrical Engineering +14

19.4 embedded 1Mb ReRAM in 28nm CMOS with 0.27-to-1V read using swing-sample-and-couple sense amplifier and self-boost-write-termination scheme

Meng‐Fan Chang, Jui-Jen Wu, Tun-Fei Chien et al. · 2014 · 149 citations

Engineering, Computer Engineering, Electrical Engineering +12

A 64-Mb Embedded FRAM Utilizing a 130-nm 5LM Cu/FSG Logic Process

H. McAdams, R. Acklin, T.G.W. Blake et al. · IEEE Journal of Solid-State Circuits · 2004 · 121 citations

Engineering, Computer Engineering, Electrical Engineering +14

Impact of negative bias temperature instability on digital circuit reliability

Vijay Reddy, Anand Krishnan, Andrew Marshall et al. · Microelectronics Reliability · 2004 · 120 citations

Engineering, Computer Engineering, Electrical Engineering +14

Expressing and maintaining timing constraints in FLEX

Kwei-Jay Lin, S. Natarajan · 2003 · 73 citations

Computing, Computer Science, Computer Systems +16