John Arnold

Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET

N. Loubet, Terence B. Hook, P. Montanini et al. · 2017 · 988 citations

Engineering, Electrical Engineering, Microelectronics +15

Charging of pattern features during plasma etching

John Arnold, Herbert H. Sawin · Journal of Applied Physics · 1991 · 292 citations

Natural Sciences, Electrical Engineering, Physics +15

A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels

Ruijie Xie, P. Montanini, Kerem Akarvardar et al. · 2016 · 144 citations

Engineering, Electrical Engineering, Materials Science +15

Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing

Haining Yang, R. Malik, Y. Li et al. · 2005 · 142 citations

Engineering, Electrical Engineering, Manufacturing Engineering +11

Kinetic study of low energy argon ion-enhanced plasma etching of polysilicon with atomic/molecular chlorine

Jane P. Chang, John Arnold, Gavin C. H. Zau et al. · Journal of Vacuum Science & Technology A Vacuum Surfaces and Films · 1997 · 140 citations

Natural Sciences, Chemistry, Physics +7