Jung-Bum Shin

An Interpolating Digitally Controlled Oscillator for a Wide-Range All-Digital PLL

Kwang-Hee Choi, Jung-Bum Shin, Jae-Yoon Sim et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2009 · 48 citations

Wide-range All-digital Pll, High-frequency Device, Mixed-signal Integrated Circuit +8

25.1 A 3.2Gb/s/pin 8Gb 1.0V LPDDR4 SDRAM with integrated ECC engine for sub-1V DRAM core operation

Tae-Young Oh, Hoeju Chung, Young-Chul Cho et al. · 2014 · 40 citations

Lpddr4 Dram, Engineering, Vlsi Design +10

A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking

Young-Ju Kim, Hye-Jung Kwon, Su-Yeon Doo et al. · 2018 · 27 citations

Engineering, Hardware Acceleration, High Bandwidth Memory +13

23.4 An extremely low-standby-power 3.733Gb/s/pin 2Gb LPDDR4 SDRAM for wearable devices

Hye-Jung Kwon, Eunsung Seo, Chan Yong Lee et al. · 2017 · 19 citations

Low-power Electronics, Hardware Security, Electrical Engineering +13

A Single-Data-Bit Blind Oversampling Data-Recovery Circuit With an Add-Drop FIFO for USB2.0 High-Speed Interface

Sang-Hune Park, Kwang-Hee Choi, Jung-Bum Shin et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 2008 · 17 citations

Conventional Blind, Usb2.0 High-speed Interface, Data-recovery Circuit +6