K. Lee

Characteristics and device design of sub-100 nm strained Si N- and PMOSFETs

K. Rim, J. O. Chu, H. Chen et al. · 2003 · 144 citations

Engineering, Electrical Engineering, Materials Science +15

Strained Si CMOS (SS CMOS) technology: opportunities and challenges

K. Rim, Robert E. Anderson, D. Boyd et al. · Solid-State Electronics · 2003 · 91 citations

Engineering, Computer Engineering, Electrical Engineering +14

Experimental high performance sub-0.1 /spl mu/m channel nMOSFET's

Y. J. Mii, S. A. Rishton, D. P. Kern et al. · IEEE Electron Device Letters · 1994 · 51 citations

Engineering, Electrical Engineering, Microelectronics +11

Poly-Si/AlN/HfSiO Stack for Ideal Threshold Voltage and Mobility in Sub-100 nm MOSFETs

K. Lee, Martin M. Frank, Vamsi Paruchuri et al. · 2006 · 17 citations

Engineering, Electrical Engineering, Materials Science +17