Concepedia

Masanao Yamaoka

MY

43

Publications

2.5K

Citations

27

H-Index

2003

Active since

Affiliations

Hitachi (Japan)(Current)

Renesas Electronics (Japan)

Renesas Electronics (United States)

The University of Tokyo

Waseda University

Masanao Yamaoka is an author at Hitachi (Japan) specializing in computer engineering, engineering, and computer architecture.

Top concepts

EngineeringComputer EngineeringComputer ArchitectureMicroelectronicsElectrical EngineeringVlsi DesignComputer ScienceParallel ComputingLow-power ElectronicsParallel Programming

Publications per year

2003–2021

43

Publications

43

A 20k-Spin Ising Chip to Solve Combinatorial Optimization Problems With CMOS Annealing

Masanao Yamaoka, Chihiro Yoshimura, Masato Hayashi et al. · IEEE Journal of Solid-State Circuits · 2015 · 358 citations

Silicon on thin BOX: a new paradigm of the CMOSFET for low-power and high-performance application featuring wide-range back-bias control

Ryuta Tsuchiya, M. Horiuchi, S. Kimura et al. · 2005 · 143 citations

Low-power Electronics, Non-volatile Memory, Electrical Engineering +13

Low-power embedded SRAM modules with expanded margins for writing

Masanao Yamaoka, Noriaki Maeda, Yoshihiro Shinozaki et al. · 2005 · 135 citations

Hardware Security, Low-power Electronics, Electrical Engineering +12

Low-Power Embedded SRAM Modules with Expanded Margins for Writing

Masanao Yamaoka, Noriaki Maeda, Yoshihiro Shinozaki et al. · IEICE Technical Report; IEICE Tech. Rep. · 2005 · 124 citations

Hardware Security, Low-power Electronics, Electrical Engineering +12

24.3 20k-spin Ising chip for combinational optimization problem with CMOS annealing

Masanao Yamaoka, Chihiro Yoshimura, Masato Hayashi et al. · 2015 · 110 citations

Engineering, Computer Architecture, 20K-spin Ising Chip +16

Rows per page

1–5 of 43