Kota Ando

BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W

Kota Ando, Kodai Ueyoshi, Kentaro Orimo et al. · IEEE Journal of Solid-State Circuits · 2017 · 157 citations

Engineering, Computer Engineering, Computer Science +17

STATICA: A 512-Spin 0.25M-Weight Annealing Processor With an All-Spin-Updates-at-Once Architecture for Combinatorial Optimization With Complete Spin–Spin Interactions

Kasho Yamamoto, Kazushi Kawamura, Kota Ando et al. · IEEE Journal of Solid-State Circuits · 2020 · 115 citations

Computing, Computer Engineering, Computer Science +13

QUEST: A 7.49TOPS multi-purpose log-quantized DNN inference engine stacked on 96MB 3D SRAM using inductive-coupling technology in 40nm CMOS

Kodai Ueyoshi, Kota Ando, Kazutoshi Hirose et al. · 2018 · 94 citations

Engineering, Computer Engineering, Computer Science +17

BRein memory: A 13-layer 4.2 K neuron/0.8 M synapse binary/ternary reconfigurable in-memory deep neural network accelerator in 65 nm CMOS

Kota Ando, Kodai Ueyoshi, Kentaro Orimo et al. · 2017 · 83 citations

Engineering, Computer Engineering, Computer Science +17

7.3 STATICA: A 512-Spin 0.25M-Weight Full-Digital Annealing Processor with a Near-Memory All-Spin-Updates-at-Once Architecture for Combinatorial Optimization with Complete Spin-Spin Interactions

Kasho Yamamoto, Kota Ando, Normann Mertig et al. · 2020 · 71 citations

Computing, Computer Engineering, Computer Science +14