Yasser Sherazi

The Complementary FET (CFET) for CMOS scaling beyond N3

Julien Ryckaert, P. Schuddinck, Pieter Weckx et al. · 2018 · 229 citations

Engineering, Computer Engineering, Electrical Engineering +17

Power aware FinFET and lateral nanosheet FET targeting for 3nm CMOS technology

Dmitry Yakimets, M. Garcia Bardon, Doyoung Jang et al. · 2017 · 118 citations

Engineering, Computer Engineering, Electrical Engineering +17

Extreme scaling enabled by 5 tracks cells: Holistic design-device co-optimization for FinFETs and lateral nanowires

M. Garcia Bardon, Yasser Sherazi, P. Schuddinck et al. · 2016 · 71 citations

Engineering, Electrical Engineering, Microelectronics +16

Device-, Circuit- & Block-level evaluation of CFET in a 4 track library

P. Schuddinck, Odysseas Zografos, Pieter Weckx et al. · 2019 · 67 citations

Engineering, Computer Engineering, Electrical Engineering +16

Power-performance Trade-offs for Lateral NanoSheets on Ultra-Scaled Standard Cells

M. Garcia Bardon, Yasser Sherazi, Doyoung Jang et al. · 2018 · 53 citations

Engineering, Computer Engineering, Electrical Engineering +17