H.‐H. Tseng

Fermi-Level Pinning at the Polysilicon/Metal Oxide Interface—Part I

C. C. Hobbs, L. R. C. Fonseca, A. A. Knizhnik et al. · IEEE Transactions on Electron Devices · 2004 · 224 citations

Electrical Engineering, Engineering, Physics +13

The effects of boron penetration on p/sup +/ polysilicon gated PMOS devices

J.R. Pfiester, F.K. Baker, T.C. Mele et al. · IEEE Transactions on Electron Devices · 1990 · 211 citations

Electrical Engineering, Polysilicon Gate, Engineering +13

Dipole model explaining high-k/metal gate field effect transistor threshold voltage tuning

P. D. Kirsch, P. Sivasubramani, Jimin Huang et al. · Applied Physics Letters · 2008 · 177 citations

Device Modeling, Electrical Engineering, Interface Dipole Model +11

Fermi-Level Pinning at the Polysilicon/Metal–Oxide Interface—Part II

C. C. Hobbs, L. R. C. Fonseca, A. A. Knizhnik et al. · IEEE Transactions on Electron Devices · 2004 · 174 citations

Materials Science, Electrical Engineering, Semiconductor Device +14

GeSn-based p-i-n photodiodes with strained active layer on a Si wafer

H.‐H. Tseng, H. Li, V. I. Mashanov et al. · Applied Physics Letters · 2013 · 154 citations

Wide-bandgap Semiconductor, Optical Materials, Engineering +22