David J. Rennie

A Soft Error Tolerant 10T SRAM Bit-Cell With Differential Read Capability

Shah M. Jahinuzzaman, David J. Rennie, Manoj Sachdev · IEEE Transactions on Nuclear Science · 2009 · 276 citations

Low-power Electronics, Non-volatile Memory, Electrical Engineering +13

Neutron- and Proton-Induced Single Event Upsets for D- and DICE-Flip/Flop Designs at a 40 nm Technology Node

T. D. Loveless, S. Jagannathan, Trey Reece et al. · IEEE Transactions on Nuclear Science · 2011 · 123 citations

Engineering, Dice Designs, Neutron Scattering +16

A 100MHz Eight-Phase Buck Converter Delivering 12A in 25mm2 Using Air-Core Inductors

G. Schrom, P. Hazucha, Fabrice Paillet et al. · Conference proceedings/Conference proceedings - IEEE Applied Power Electronics Conference and Exposition · 2007 · 68 citations

Low-power Electronics, Electrical Engineering, Engineering +8

Single-Event Tolerant Flip-Flop Design in 40-nm Bulk CMOS Technology

S. Jagannathan, T. D. Loveless, B. L. Bhuva et al. · IEEE Transactions on Nuclear Science · 2011 · 48 citations

Hardware Security, Low-power Electronics, Electrical Engineering +13

Performance, Metastability, and Soft-Error Robustness Trade-offs for Flip-Flops in 40 nm CMOS

David J. Rennie, David Li, Manoj Sachdev et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2012 · 35 citations

Engineering, Vlsi Design, Nm Cmos +17