Shah M. Jahinuzzaman

A Soft Error Tolerant 10T SRAM Bit-Cell With Differential Read Capability

Shah M. Jahinuzzaman, David J. Rennie, Manoj Sachdev · IEEE Transactions on Nuclear Science · 2009 · 276 citations

Low-power Electronics, Non-volatile Memory, Electrical Engineering +13

Soft Error Susceptibilities of 22 nm Tri-Gate Devices

N. Seifert, B. Gill, Shah M. Jahinuzzaman et al. · IEEE Transactions on Nuclear Science · 2012 · 182 citations

Engineering, Vlsi Design, Nm Planar Devices +16

Soft Error Rate Improvements in 14-nm Technology Featuring Second-Generation 3D Tri-Gate Transistors

N. Seifert, Shah M. Jahinuzzaman, Jyothi Velamala et al. · IEEE Transactions on Nuclear Science · 2015 · 123 citations

Engineering, Vlsi Design, Nuclear Physics +16

An Analytical Model for Soft Error Critical Charge of Nanometric SRAMs

Shah M. Jahinuzzaman, Mohammad Sharifkhani, Manoj Sachdev · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2009 · 98 citations

Engineering, Vlsi Design, Critical Charge +17

Threshold voltage instability of amorphous silicon thin-film transistors under constant current stress

Shah M. Jahinuzzaman, Afrin Sultana, K. Sakariya et al. · Applied Physics Letters · 2005 · 78 citations

Device Modeling, Electrical Engineering, Engineering +15