A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications

Siddarth Krishnan, U. Kwon, N. Moumen, +59

Sige ChannelsLow Power ApplicationsEngineeringVlsi DesignIntegrated Circuits +14

Improvement of threshold voltage deviation in damascene metal gate transistors

A. Yagishita, Tomohiro Saito, K. Nakajima, +6

IEEE Transactions on Electron Devices

Device ModelingMaterials ScienceElectrical EngineeringMaterials EngineeringEngineering +8

High performance damascene metal gate MOSFETs for 0.1 μm regime

A. Yagishita, Tomohiro Saito, K. Nakajima, +8

IEEE Transactions on Electron Devices

EngineeringμM RegimeDamascene Gate ProcessSilicon On InsulatorMaterials Technology +14

High performance metal gate MOSFETs fabricated by CMP for 0.1 μm regime

A. Yagishita, Tomohiro Saito, K. Nakajima, +9

Materials ScienceSemiconductor TechnologyElectrical EngineeringμM RegimeEngineering +11

Nitrogen profile control by plasma nitridation technique for poly-Si gate HfSiON CMOSFET with excellent interface property and ultra-low leakage current

Ken‐Taro Sekine, Seiji Inumiya, Motoyuki Sato, +3

Materials ScienceElectrical EngineeringNitrogen Profile ControlUltra-low LeakageBoron Diffusion +10

Fabrication of HfSiON gate dielectrics by plasma oxidation and nitridation, optimized for 65 nm mode low power CMOS applications

Seiji Inumiya, Ken‐Taro Sekine, S. Niwa, +10

Materials ScienceMaterials EngineeringElectrical EngineeringSemiconductor DeviceEngineering +11

Impact of metal gate electrode on Weibull distribution of TDDB in HfSiON gate dielectrics

Izumi Hirano, Yasushi Nakasaki, Shigeto Fukatsu, +6

Wide-bandgap SemiconductorEngineeringDc StressMetal Gate ElectrodeSemiconductor Device +16

Time-dependent dielectric breakdown (TDDB) distribution in n-MOSFET with HfSiON gate dielectrics under DC and AC stressing

Izumi Hirano, Yasushi Nakasaki, Shigeto Fukatsu, +6

Microelectronics Reliability

Electrical EngineeringEngineeringStress-induced Leakage CurrentBias Temperature InstabilityTime-dependent Dielectric Breakdown +5

Observation of leakage sites in a hafnium silicon oxynitride gate dielectric of a metal-oxide-semiconductor field-effect transistor device by electron-beam-induced current

Jun Chen, Takashi Sekiguchi, Naoki Fukata, +8

Applied Physics Letters

Gate DielectricsElectrical EngineeringEngineeringNanoelectronicsStress-induced Leakage Current +9

Comprehensive Analysis of Positive and Negative Bias Temperature Instabilities in High-k/Metal Gate Stack Metal–Oxide–Silicon Field Effect Transistors with Equivalent Oxide Thickness Scaling to Sub-1 nm

Motoyuki Sato, Kikuo Yamabe, Kenji Shiraishi, +8

Japanese Journal of Applied Physics

Semiconductor TechnologyElectrical EngineeringWet Oxide InterfaceEngineeringPhysics +13