Thibault Buisson

Integration of TSVs, wafer thinning and backside passivation on full 300mm CMOS wafers for 3D applications

Anne Jourdain, Thibault Buisson, Alain Phommahaxay et al. · 2011 · 55 citations

Engineering, Backside Passivation, Extreme Wafer Thinning +19

Key elements for sub-50μm pitch micro bump processes

Joeri De Vos, Lieve Bogaerts, Thibault Buisson et al. · 2013 · 19 citations

Engineering, Mechanical Engineering, Computer-aided Design +20

300mm wafer thinning and backside passivation compatibility with temporary wafer bonding for 3D stacked IC applications

Anne Jourdain, Thibault Buisson, Alain Phommahaxay et al. · 2010 · 18 citations

Engineering, Mechanical Engineering, Wafer Scale Processing +16

Analysis of microbump induced stress effects in 3D stacked IC technologies

Alojz Ivankoviç, Geert Van der Plas, Victor Moroz et al. · 2012 · 18 citations

Engineering, Stacked Ic Technologies, Mechanical Engineering +21

Challenges and improvements for 3D-IC integration using ultra thin (25μm) devices

Antonio Manna, Thibault Buisson, Mikael Detalle et al. · 2012 · 14 citations

Engineering, Device Integration, Interconnect (Integrated Circuits) +17