Future of plasma etching for microelectronics: Challenges and opportunities

G. S. Oehrlein, Stephan M. Brandstadter, Robert L. Bruce, +32

Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics Materials Processing Measurement and Phenomena

Materials ScienceElectrical EngineeringDigital TwinsEngineeringPlasma Electronics +12

High-Performance FinFET with Dopant-Segregated Schottky Source/Drain

A. Kaneko, A. Yagishita, K. Yahashi, +18

Low-power ElectronicsPropagation Delay TimeElectrical EngineeringEngineeringNanoelectronics +8

Sidewall transfer process and selective gate sidewall spacer formation technology for sub-15nm finfet with elevated source/drain extension

A. Kaneko, A. Yagishita, K. Yahashi, +15

Electrical EngineeringEngineeringSidewall Transfer ProcessSpacer FormationNanoelectronics +6

Formation mechanism of sidewall striation in high-aspect-ratio hole etching

Mitsuhiro Omura, Jun-ichi Hashimoto, Takahiro ADACHI, +7

Japanese Journal of Applied Physics

EngineeringPlasma ProcessingIon ImplantationPlasma ElectronicsBeam Lithography +15

Progress and perspectives in dry processes for nanoscale feature fabrication: fine pattern transfer and high-aspect-ratio feature formation

Taku Iwase, Yoshito Kamaji, Song Kang, +17

Japanese Journal of Applied Physics

EngineeringElectron-beam LithographyPattern TransferDry ProcessesBeam Lithography +19

Sub-30nm via interconnects fabricated using directed self-assembly

Hirokazu Kato, Yuriko Seino, Hiroki Yonemitsu, +7

Microelectronic Engineering

Electrical EngineeringWafer Scale ProcessingEngineeringAdvanced Packaging (Semiconductors)Microfabrication +6

Electrical Via Chain Yield for DSA Contact Hole Shrink Process

Hirokazu Katō, Yuriko Seino, Hiroki Yonemitsu, +7

Journal of Photopolymer Science and Technology

Electrical EngineeringEngineeringChain YieldAdvanced Packaging (Semiconductors)Microfabrication +9

A 0.602 /spl mu/m/sup 2/ nestled 'Chain' cell structure formed by one mask etching process for 64 Mbit FeRAM

Haruichi Kanaya, K. Tomioka, T. Matsushita, +30

Cell StructureEngineeringVlsi DesignMicroscopyMolecular Biology +15

Compensating of room acoustic transfer functions affected by change of room temperature

Mitsuhiro Omura, M. Yada, Hiroshi Saruwatari, +3

AeroacousticsEngineeringAcoustic ModelingSpeech RecognitionAudio Signal Processing +17

High aspect ratio SiO₂/SiN (ON) stacked layer etching using C₃HF₅, C₄H₂F₆, and C₄H₄F₆

Chihiro Abe, Toshiyuki Sasaki, Yukishige Kondo, +7

Japanese Journal of Applied Physics