Thierry Mourier

Through silicon via: From the CMOS imager sensor wafer level package to the 3D integration

X. Gagnard, Thierry Mourier · Microelectronic Engineering · 2009 · 150 citations

Engineering, Electrical Engineering, Microelectronics +13

Three-dimensional hybrid bonding integration challenges and solutions toward multi-wafer stacking

L. Arnaud, C. Karam, N. Bresson et al. · MRS Communications · 2020 · 40 citations

Engineering, Materials Engineering, Materials Science +14

Experimental measurements of electron scattering parameters in Cu narrow lines

S. Maı̂trejean, Roland Gers, Thierry Mourier et al. · Microelectronic Engineering · 2006 · 37 citations

Natural Sciences, Materials Science, Physics +6

Study of low temperature MOCVD deposition of TiN barrier layer for copper diffusion in high aspect ratio through silicon vias

Larissa Djomeni, Thierry Mourier, Stéphane Minoret et al. · Microelectronic Engineering · 2013 · 36 citations

Engineering, Materials Engineering, Materials Science +16

Evaluation of (hfac)Cu(MHY) for Cu CVD

Mickaël Joulaud, C Angekort, P. Doppelt et al. · Microelectronic Engineering · 2002 · 30 citations

Natural Sciences, Materials Engineering, Materials Science +7