C. Laviron

FDSOI devices with thin BOX and ground plane integration for 32nm node and below

C. Fenouillet-Béranger, S. Denorme, P. Perreau et al. · Solid-State Electronics · 2009 · 130 citations

3D Ic Architecture, Electrical Engineering, Engineering +12

Impact of a 10nm ultra-thin BOX (UTBOX) and ground plane on FDSOI devices for 32nm node and below

C. Fenouillet-Béranger, P. Perreau, S. Denorme et al. · Solid-State Electronics · 2010 · 63 citations

Electrical Engineering, Semiconductor Device, Engineering +12

Fully-depleted SOI technology using high-k and single-metal gate for 32 nm node LSTP applications featuring 0.179 μm² 6T-SRAM bitcell

C. Fenouillet-Béranger, J. Todeschini, Jean-Christophe Le-Denmat et al. · 2007 · 61 citations

Pmos Transistors, Semiconductor Technology, Electrical Engineering +13

Nature of the structural distortion and of the chemical bonding in SnM3Rh4Sn12 (M = LaGd, Yb, Ca, Sr, and Th)

S. Miraglia, J.L. Hodeau, M. Marezio et al. · Journal of Solid State Chemistry · 1986 · 53 citations

Laser thermal processing for ultra shallow junction formation: numerical simulation and comparison with experiments

Miguel Hernández, J. Venturini, D. Zahorski et al. · Applied Surface Science · 2003 · 40 citations

Photonics, Advanced Laser Processing, Engineering +12