Changhyun Kim

8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology

Uksong Kang, Hoeju Chung, Seongmoo Heo et al. · IEEE Journal of Solid-State Circuits · 2010 · 484 citations

3D Ic Architecture, Electrical Engineering, Engineering +12

A 4-Gb/s/pin low-power memory I/O interface using 4-level simultaneous bi-directional signaling

Jin-Hyun Kim, Woo-Seop Kim, Jung‐Hwan Choi et al. · IEEE Journal of Solid-State Circuits · 2005 · 30 citations

Non-volatile Memory, Electrical Engineering, High-speed Drams +14

A 1.4 Gb/s DLL using 2nd order charge-pump scheme with low phase/duty error for high-speed DRAM application

Kyu Hyun Kim, Jung-Bae Lee, Woojin Lee et al. · 2004 · 14 citations

Phase Error, Vlsi Design, Duty-cycle Corrector Performance +16

Low-voltage, high-speed circuit designs for gigabit DRAMs

Kyuchan Lee, Changhyun Kim, Dong-Ryul Ryu et al. · IEEE Journal of Solid-State Circuits · 1997 · 13 citations

Low-power Electronics, Electrical Engineering, Engineering +10