Sandeepan DasGupta

Critical Charge Characterization for Soft Error Rate Modeling in 90nm SRAM

Riaz Naseer, Y. Boulghassoul, Jeff Draper et al. · 2007 · 121 citations

Device Modeling, Electrical Engineering, Engineering +13

Models and Algorithmic Limits for an ECC-Based Approach to Hardening Sub-100-nm SRAMs

Michael Bajura, Y. Boulghassoul, Riaz Naseer et al. · IEEE Transactions on Nuclear Science · 2007 · 112 citations

Non-volatile Memory, Engineering, Vlsi Design +21

Analysis of Parasitic PNP Bipolar Transistor Mitigation Using Well Contacts in 130 nm and 90 nm CMOS Technology

Brian D. Olson, Oluwole A. Amusan, Sandeepan DasGupta et al. · IEEE Transactions on Nuclear Science · 2007 · 105 citations

Device Modeling, Mixed- Mode Simulations, Electrical Engineering +13

3D heterogeneous integration of high performance high-K metal gate GaN NMOS and Si PMOS transistors on 300mm high-resistivity Si substrate for energy-efficient and compact power delivery, RF (5G and beyond) and SoC applications

Han Wui Then, Changyang Huang, B. Krist et al. · 2019 · 99 citations

Design Techniques to Reduce SET Pulse Widths in Deep-Submicron Combinational Logic

Oluwole A. Amusan, L. W. Massengill, B. L. Bhuva et al. · IEEE Transactions on Nuclear Science · 2007 · 94 citations

Engineering, Vlsi Design, Computer Architecture +19