J. Lutze

NMOS drive current reduction caused by transistor layout and trench isolation induced stress

G. Scott, J. Lutze, F. Nouri et al. · 2003 · 125 citations

Engineering, Electrical Engineering, Microelectronics +16

A 34 MB/s MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm Technology

Raul-Adrian Cernea, Long Pham, Farookh Moogat et al. · IEEE Journal of Solid-State Circuits · 2009 · 76 citations

Engineering, Computer Engineering, Computer Science +14

A 56-nm CMOS 99-${\hbox {mm}}^{2} $ 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput

Ken Takeuchi, Yasushi Kameda, Susumu Fujimura et al. · IEEE Journal of Solid-State Circuits · 2007 · 70 citations

Engineering, Computer Engineering, Electrical Engineering +14

A low-power high-speed ion-implanted JFET for InP-based monolithic optoelectronic IC's

Sang Jeong Kim, K.W. Wang, G. P. Vella‐Coleiro et al. · IEEE Electron Device Letters · 1987 · 36 citations

Engineering, Electrical Engineering, Materials Science +16

Device drive current degradation observed with retrograde channel profiles

S. Venkatesan, J. Lutze, Craig Lage et al. · 2002 · 23 citations

Engineering, Electrical Engineering, Microelectronics +16