G. Pollack - Concepedia

Author

G. Pollack

Texas Instruments (United States)

Also Known As

G. P. Pollack, G. Pollack, G.P. Pollack, Gordon P. Pollack, Gordon Pollack

Publications

1.2K

Citations

H-Index

Concepts

All Affiliations

Texas Instruments (United States)Boeing (United States)Wayne State University United States Naval Research Laboratory The University of Texas at Dallas

About

G. Pollack is an author at Texas Instruments (United States) specializing in engineering, microelectronics, and electrical engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	17	23	1.1K
2	Applied Physics	13	16	899
3	Computer Engineering	9	9	412
4	Chemistry	2	2	147
5	Chemical Engineering	1	1	13

G. Pollack

Publications

1.1K

Citations

H-Index

Page 1

	Year	Citations
Single-transistor latch in SOI MOSFETs C.-D. Chen, M. Matloubian, R. Sundaresan, IEEE Electron Device Letters Positive FeedbackElectrical EngineeringEngineeringSingle-transistor LatchStress-induced Leakage Current	1988	192
Characteristics and three-dimensional integration of MOSFET's in small-grain LPCVD polycrystalline Silicon S.D.S. Malhi, H. Shichijo, S. Banerjee, IEEE Transactions on Electron Devices EngineeringVlsi DesignComputer ArchitectureCmos 64KSilicon On Insulator	1985	190
Photoelectric properties of cuprous oxide G. Pollack, D. Trivich Journal of Applied Physics Materials SciencePhotoluminescenceEngineeringPhotochemistryOptical Properties	1975	119
Hydrogen passivation of PolySilicon MOSFET's from a plasma Nitride source G. Pollack, W.F. Richardson, S.D.S. Malhi, IEEE Electron Device Letters Semiconductor TechnologyElectrical EngineeringEngineeringHigh MobilityApplied Physics	1984	84
Performance enhancement of n-channel inversion type InxGa1−xAs metal-oxide-semiconductor field effect transistor using <i>ex situ</i> deposited thin amorphous silicon layer Arif Sonnet, Christopher L. Hinkle, Mahesh Jivani, Applied Physics Letters SemiconductorsSemiconductor TechnologyElectrical EngineeringPerformance EnhancementEngineering	2008	58
Transistor design issues in integrating analog functions with high performance digital CMOS Amitava Chatterjee, K. Vasanth, D.T. Grider, Electrical EngineeringEngineeringTransistor Design IssuesAnalog Integrated CircuitsPocket Implant Parameters	2003	55
A trench transistor cross-point DRAM cell W.F. Richardson, D.M. Bordelon, G. Pollack, Electrical EngineeringEngineeringDeep TrenchNanoelectronicsDram Cell	1985	47
Total Dose Hardening of Buried Insulator in Implanted Silicon-on-Insulator Structures B.-Y. Mao, Cheng-Eng Chen, G. Pollack, IEEE Transactions on Nuclear Science Electrical EngineeringIon ImplantationEngineeringSemiconductor DeviceBias Temperature Instability	1987	38
Modeling of the subthreshold characteristics of SOI MOSFETs with floating body M. Matloubian, C.-E.D. Chen, B.-Y. Mao, IEEE Transactions on Electron Devices Device ModelingPositive FeedbackElectrical EngineeringSemiconductor DeviceEngineering	1990	31
A 4-Mbit DRAM with trench-transistor cell A.H. Shah, C. Wang, R.H. Womack, IEEE Journal of Solid-State Circuits Non-volatile MemoryElectrical EngineeringScd ModesEngineeringNanoelectronics	1986	31

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