Electronics · 2024 · 17 citations · 29 references
ComputingAgricultural EngineeringComputer ScienceArtificial IntelligenceEdge ComputingMachine LearningCrop ClassificationDeep LearningEdge Artificial IntelligenceFeature ExtractionFruit RipeningPattern RecognitionConvolutional Neural NetworksField-programmable Gate Array AccelerationField-programmable Gate Array AcceleratorsImage Feature ExtractionK-nearest NeighborsMemory OverheadSystolic Array DesignSystolic Arrays
Image analysis-based artificial intelligence (AI) models leveraging convolutional neural networks (CNN) take a significant role in evaluating the ripeness of strawberry, contributing to the maximization of productivity. However, the convolution, which constitutes the majority of the CNN models, imposes significant computational burdens. Additionally, the dense operations in the fully connected (FC) layer necessitate a vast number of parameters and entail extensive external memory access. Therefore, reducing the computational burden of convolution operations and alleviating memory overhead is essential in embedded environment. In this paper, we propose a strawberry ripeness classification system utilizing a convolution-based feature extractor (CoFEx) for accelerating convolution operations and an edge AI processor, Intellino, for replacing FC layer operations. We accelerated feature map extraction utilizing the CoFEx constructed with systolic array (SA) and alleviated the computational burden and memory overhead associated with the FC layer operations by replacing them with the k-nearest neighbors (k-NN) algorithm. The CoFEx and the Intellino both were designed with Verilog HDL and implemented on a field-programmable gate array (FPGA). The proposed system achieved a high precision of 93.4%, recall of 93.3%, and F1 score of 0.933. Therefore, we demonstrated a feasibility of the strawberry ripeness classification system operating in an embedded environment.
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