Concepedia

TLDR

Domain‑specific hardware is increasingly viewed as essential for cost‑energy‑performance gains, yet the TPU remains small and low power because it lacks many features that would otherwise boost its throughput. This study evaluates the Tensor Processing Unit (TPU), a custom ASIC deployed in datacenters since 2015, for accelerating neural‑network inference. The TPU’s core is a 65,536‑cell 8‑bit MAC matrix‑multiply engine delivering 92 TOPS with 28 MiB on‑chip memory, and its deterministic execution model better satisfies 99th‑percentile latency demands than CPUs or GPUs; the authors benchmarked it against an Intel Haswell CPU and an Nvidia K80 GPU using TensorFlow workloads that cover 95 % of datacenter inference traffic. The TPU achieves 15–30× higher throughput and 30–80× higher TOPS/Watt than contemporary GPUs or CPUs, and adding the CPU’s GDDR5 memory to the TPU could triple its TOPS and raise TOPS/Watt to roughly 70× the GPU and 200× the CPU.

Abstract

Many architects believe that major improvements in cost-energy-performance must now come from domain-specific hardware. This paper evaluates a custom ASIC---called a Tensor Processing Unit (TPU) --- deployed in datacenters since 2015 that accelerates the inference phase of neural networks (NN). The heart of the TPU is a 65,536 8-bit MAC matrix multiply unit that offers a peak throughput of 92 TeraOps/second (TOPS) and a large (28 MiB) software-managed on-chip memory. The TPU's deterministic execution model is a better match to the 99th-percentile response-time requirement of our NN applications than are the time-varying optimizations of CPUs and GPUs that help average throughput more than guaranteed latency. The lack of such features helps explain why, despite having myriad MACs and a big memory, the TPU is relatively small and low power. We compare the TPU to a server-class Intel Haswell CPU and an Nvidia K80 GPU, which are contemporaries deployed in the same datacenters. Our workload, written in the high-level TensorFlow framework, uses production NN applications (MLPs, CNNs, and LSTMs) that represent 95% of our datacenters' NN inference demand. Despite low utilization for some applications, the TPU is on average about 15X -- 30X faster than its contemporary GPU or CPU, with TOPS/Watt about 30X -- 80X higher. Moreover, using the CPU's GDDR5 memory in the TPU would triple achieved TOPS and raise TOPS/Watt to nearly 70X the GPU and 200X the CPU.

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