Role of critical thickness in SiGe/Si/SiGe heterostructure design for qubits

Abstract

We study the critical thickness for the plastic relaxation of the Si quantum well layer embedded in a SiGe/Si/SiGe heterostructure for qubits by plan-view transmission electron microscopy and electron channeling contrast imaging. Misfit dislocation segments form due to the glide of pre-existing threading dislocations at the interface of the Si quantum well layer beyond a critical thickness given by the Matthews–Blakeslee criterion. Misfit dislocations are mostly 60° dislocations (b=a/2 <110>) that are split into Shockely partials (b=a/6 <112>) due to the tensile strain field of the Si quantum well layer. By reducing the quantum well thickness below critical thickness, misfit dislocations can be suppressed. A simple model is applied to simulate the misfit dislocation formation and the blocking process. We discuss consequences of our findings for the layer stack design of SiGe/Si/SiGe heterostructures for usage in quantum computing hardware.