2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC) · 2018 · 15 citations · 19 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMachine LearningSystem-on-chip DesignAnalog Integrated CircuitsDevice ScalingTransfer LearningAccuracyDevice Mismatch ToleranceLearningPrecision ScalingProcess Variation AnalysisProcess Variation CompensationProcess Variation RobustnessProcess Variation Tolerance
Process Variation (PV) may cause accuracy loss of the analog neural network (ANN) processors, and make it hard to be scaled down, as well as feasibility degrading. This paper first analyses the impact of PV on the performance of ANN chips. Then proposes an in-situ transfer learning method at system level to reduce PV's influence with low-precision back-propagation. Simulation results show the proposed method could increase 50% tolerance of operating point drift and 70%~00% tolerance of mismatch with less than 1% accuracy loss of benchmarks. It also reduces 66.7% memories and has about 50 × energy-efficiency improvement of multiplication in the learning stage, compared with the conventional full-precision (32bit float) training system.
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