Concepedia

Device Mismatch Tolerance

Device Mismatch Tolerance is a design-level metric in subthreshold circuit design that quantifies the ability of a circuit to maintain functional and performance specifications despite variations in transistor parameters due to manufacturing-induced mismatches.

75

Publications

2.4K

Citations

236

Authors

99

Institutions

Publications per year

2017–2026

10

Parents

Publications

75

Analog circuits in ultra-deep-submicron CMOS

Anne-Johan Annema, Bram Nauta, R. van Langevelde et al. · IEEE Journal of Solid-State Circuits · 2005 · 421 citations · Full text

, , +16

Carbon Nanotube Transistor Circuits: Circuit-Level Performance Benchmarking and Design Options for Living with Imperfections

Jie Deng, Nishant Patil, Koungmin Ryu et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 2007 · 143 citations

, , +17

A Technique For Reducing Differential Non-linearity Errors In Flash A/D Converters

K. Kattmann, J. Barrow · 1991 · 140 citations

, , +15

CMOS switched-current ladder filters

T.S. Fiez, D.J. Allstot · IEEE Journal of Solid-State Circuits · 1990 · 101 citations

, , +17

Characterization of subthreshold MOS mismatch in transistors for VLSI systems

A. Pavasović, Andreas G. Andreou, Charles R. Westgate · Analog Integrated Circuits and Signal Processing · 1994 · 82 citations

, , +13

1–5 of 75

Authors

236

  1. GI
    Giacomo Indiveri

    ETH Zurich, Switzerland

    4 publications · 94 citations

    4

    h-index

  2. YC
    Yuan Chen

    The University of Sydney, Australia

    2 publications · 46 citations

    2

    h-index

  3. AM
    A. Mercha

    IMEC, Belgium

    2 publications · 34 citations

    2

    h-index

  4. SL
    Shih‐Chii Liu

    ETH Zurich, Switzerland

    2 publications · 42 citations

    2

    h-index

  5. FH
    Frank Hui

    Ames Research Center, United States

    2 publications · 46 citations

    2

    h-index

1–5 of 236

Institutions

99

  1. ETH Zurich

    Zurich, Switzerland

    4 h-index

    7 publications

    168 citations

  2. Georgia Institute of Technology

    Atlanta, United States

    4 h-index

    11 publications

    316 citations

  3. Analog Devices (United States)

    Norwood, United States

    3 h-index

    4 publications

    326 citations

  4. University of Electronic Science and Technology of China

    Chengdu, China

    2 h-index

    2 publications

    33 citations

  5. IMEC

    Leuven, Belgium

    2 h-index

    17 publications

    254 citations

  6. UNSW Sydney

    Sydney, Australia

    2 h-index

    5 publications

    113 citations

  7. Nanyang Technological University

    Singapore, Singapore

    2 h-index

    6 publications

    96 citations

  8. Stanford University

    Stanford, United States

    2 h-index

    8 publications

    628 citations

1–8 of 99

Venues

  1. IEEE Journal of Solid-State Circuits

    7 publications · 638 citations

    7

    h-index

  2. Solid-State Electronics

    3 publications · 44 citations

    3

    h-index

  3. IEEE Transactions on Neural Networks

    3 publications · 85 citations

    3

    h-index

  4. 3

    h-index

  5. Electronics Letters

    2 publications · 71 citations

    2

    h-index

1–5