Effects of Wiring Density and Pillar Structure on Chip Package Interaction for Advanced Cu Low-k Chips

Abstract

Effects of wiring density and Cu pillar structure, two key features for advanced Cu low-k chips, on chip package interaction (CPI) were investigated. A multi-level finite element analysis (FEA) model was developed to evaluate the effects on CPI based on the energy release rate driving delamination. The effect of wiring density in low-k dielectric layers and the interaction effect between intermetallic compound and wiring design were quantified to assess CPI reliability.