Micro & Nano Letters · 2019 · 11 citations · 19 references
EngineeringElectrical EngineeringMaterials ScienceMicroelectronicsSemiconductor DevicesSemiconductor MaterialsDevice SimulationIntegrated Circuit DesignMetal-oxide-semiconductor Field-effect TransistorsSemiconductor Device MaterialsSemiconductor InterfacesSemiconductor PhysicsBreakdown VoltageBreakdown Voltage OptimizationCurvatureMetal-oxide-semiconductor Field-effect Transistor ModelingSiliconSilicon CarbideSilicon Carbide (Sic) MaterialsSilicon Carbide Power Devices
A novel silicon (Si) on silicon carbide (SiC) lateral double‐diffused metal oxide semiconductor field effect transistor with deep drain region is proposed. Its main idea is transferring the breakdown point and utilising the high critical electric field of SiC material to suppress the curvature effect of the drain, which eventually alleviates the trade‐off relationship between breakdown voltage (BV) and specific on‐resistance ( R on,sp ). Through the TCAD simulation, the results show that the BV is significantly improved from 240 V for conventional Si lateral double‐diffused metal oxide semiconductor (LDMOS) to 384 V for the proposed structure with the drift region length of 20 μm, increased by 60%. The figure‐of‐merit of the conventional Si LDMOS and the Si/SiC LDMOS are 2.04 and 4.26 MW/cm 2 , respectively. It indicates that the proposed structure has better performance than the Si counterpart. The influences of design parameters and interfacial charges on the device performance are also discussed in this work.
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High voltage thin layer devices (RESURF devices)
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