Demonstration of Highly Manufacturable STT-MRAM Embedded in 28nm Logic

Abstract

We successfully demonstrated the manufacturability of 8Mb STT-MRAM embedded in 28nm FDSOI logic platform by achieving stable functionality and robust package level reliability. Read margin were greatly improved by increasing TMR value and also reducing distribution of cell resistance using advanced MTJ stack and patterning technology. Write margin was also increased by improving the efficiency using novel integration process. Its product reliability was confirmed in package level with passing HTOL 1000 hours tests, 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> endurance test, and retention test. For a wider application, we also demonstrated the feasibility of high density 128Mb STT-MRAM. Based on these results, we clearly verified the product manufacturability of embedded STT-MRAM.