Evaluation of predictive technology models

New Generation of Predictive Technology Model for Sub-45 nm Early Design Exploration

Wei Zhao, Yu Cao · IEEE Transactions on Electron Devices · 2006 · 851 citations

Engineering, Computer Engineering, Electrical Engineering +16

A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging

K. Mistry, R. Chau, Changhwan Choi et al. · 2007 · 829 citations

Engineering, Computer Engineering, Electrical Engineering +17

ASAP7: A 7-nm finFET predictive process design kit

Lawrence T. Clark, Vinay Vashishtha, L. Shifren et al. · Microelectronics Journal · 2016 · 736 citations · Full text

Engineering, Electrical Engineering, Microfabrication +13

A 14nm logic technology featuring 2<sup>nd</sup>-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 µm<sup>2</sup> SRAM cell size

S. Natarajan, M. Agostinelli, Sheikh A. Akbar et al. · 2014 · 532 citations

Engineering, Computer Engineering, Electrical Engineering +16

FreePDK: An Open-Source Variation-Aware Design Kit

James E. Stine, Ivan D. Castellanos, Michael Wood et al. · 2007 · 429 citations

Engineering, Computer Engineering, Digital Design +17