Low power design techniques and implementation strategies adopted in VLSI circuits

Abstract

Low power plays a very important role and in today's current trends of VLSI. There are appraisal techniques and extension circuits employed in low power VLSI designs. Power dissipation has main thought as performance and area. Because of higher quality, decreasing power consumption and power management on chip are the key challenges right down to 100nm. Reducing package price and battery life is a very important issue in optimization of power. Leakage current plays a very important role in power management and conjointly low power is a major drawback in high performance digital and micro chip system. Leakage current is a primary issue in total power dissipation of integrated circuits. For victorious chip it solely wants low power consumption, calculation of power dissipation. This paper discusses about future challenges that must be to design and use for low power circuits spans a wide range from device or method level to formula level.