A vertical-gaussian doped soi-tfet with enhanced dc and analog/rf performance

Abstract

Abstract In this paper, a vertical gaussian-doped tunnel-FET on SOI (VG-SOI-TFET) employing electrostatically doped (ED) p-type source is proposed and investigated. A thin silicon film with n-type Gaussian doping in the vertical direction is used initially. By using the ED concept, a p + source region is realized with Platinum having suitable work function ( ϕ m = 5.93 eV). Various dc and analog/RF parameters are studied as a function of peak donor density ( N p ) and doping gradient ( g ) of the gaussian distribution function. A 2D calibrated simulation study of the proposed VG-SOI-TFET has revealed that the I ON is increased by ∼7 times while the ambipolar current ( I AMB ) is reduced by ∼5 orders of magnitude at an optimum N p of 5 × 10 18 cm −3 and g value of 2 nm/decade, compared to the uniformly-doped SOI TFET (UD-SOI-TFET). Furthermore, a superior analog/RF figures of merit are achieved such as transconductance, capacitances, cutoff-frequency, and gain bandwidth product. An improvement of ∼5 times in peak g m and ∼5 times in peak f T are also observed at an optimum N p of 5 × 10 18 cm −3 and g value of 2 nm/decade.