Publication | Closed Access
High performance complementary Ge peaking FinFETs by room temperature neutral beam oxidation for sub-7 nm technology node applications
13
Citations
4
References
2016
Year
Unknown Venue
Materials ScienceElectrical EngineeringIon ImplantationEngineeringSemiconductor DeviceNanoelectronicsElectronic EngineeringSurface ScienceApplied PhysicsBias Temperature InstabilityAnisotropic Nbo ProcessSemiconductor Device FabricationElectronic PackagingSilicon On InsulatorMicroelectronicsPlasma EtchingNeutral Beam EtchingGe Finfets
Ge peaking n- and p-FinFETs have been demonstrated by adopting neutral beam etching (NBE) and anisotropic neutral beam oxidation (NBO) processes. The irradiation-free NB processes not only suppress surface roughness but also guarantee low defect generation on the etched Ge surface. The fabricated Ge peaking FinFETs possess several unique features: (1) A peaking fin configuration with a 6-nm top-gate formed by an anisotropic NBO process at room temperature. (2) Nearly defect-free three dimensional channel surfaces by NB processes. (3) Ion and Gm improvement by NB processes as compared to that by conventional inductively coupled plasma etching (ICP). (4) Recorded high Ion/Ioff ratio and low subthreshold swing (S.S. ~ 70 mV/dec.) of Ge n-FinFETs. (5) Excellent immunity for short channel effect of Ge FinFETs.
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