Concepedia

Author

Y.-J. Lee

National Yang Ming Chiao Tung University

Also Known As

Lee, Y.-J., Y.-J. Lee, You Jun Lee

25

Publications

283

Citations

11

H-Index

28

Concepts

All Affiliations

National Yang Ming Chiao Tung UniversityNational Institutes of Applied ResearchNational Cheng Kung UniversityIndustrial Technology Research InstituteTohoku University
YL

About

Y.-J. Lee is an author at National Yang Ming Chiao Tung University specializing in engineering, microelectronics, and electrical engineering.

Top Concepts

#ConceptH-IndexPublicationsCitations

1

Engineering

9

9

191

2

Electrical Engineering

9

9

191

3

Applied Physics

8

8

176

4

Materials Science

6

6

117

5

Natural Sciences

1

1

19

Y.-J. Lee

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11

Publications

247

Citations

11

H-Index

YearCitations

Genetic Variation in the G-50T Polymorphism of the Cytochrome P450 Epoxygenase <i>CYP2J2</i> Gene and the Risk of Younger Onset Type 2 Diabetes among Chinese Population: Potential Interaction with Body Mass Index and Family History

C.-P. Wang, Wei‐Chieh Hung, Tung‐Min Yu,

Experimental and Clinical Endocrinology & Diabetes

2010

45

A novel junctionless FinFET structure with sub-5nm shell doping profile by molecular monolayer doping and microwave annealing

Y.-J. Lee, T.-C. Cho, Kuo-Hsing Kao,

2014

41

Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrO&lt;inf&gt;x&lt;/inf&gt; on specific interfacial layers exhibiting 65% S.S. reduction and improved I&lt;inf&gt;ON&lt;/inf&gt;

C.-J. Su, Ying–Tsan Tang, Y.-C. Tsou,

2017

31

Ge nanowire FETs with HfZrO&lt;inf&gt;x&lt;/inf&gt; ferroelectric gate stack exhibiting SS of sub-60 mV/dec and biasing effects on ferroelectric reliability

Chun-Jun Su, T.-C. Hong, Y.-C. Tsou,

2017

19

A Comprehensive Study of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Layer Effects on Negative Capacitance FETs for Sub-5 nm Node

Ying–Tsan Tang, C.-J. Su, Yi‐Sheng Wang,

2018

19

Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using <i>In-Situ</i> ALD Digital O<sub>3</sub> Treatment

Mu-Shih Yeh, Guang-Li Luo, Fu-Ju Hou,

IEEE Journal of the Electron Devices Society

2018

18

First Demonstration of heterogenous Complementary FETs utilizing Low-Temperature (200 °C) Hetero-Layers Bonding Technique (LT-HBT)

Tu Hong, Wen-Hsin Chang, A. Agarwal,

2020

18

Full low temperature microwave processed Ge CMOS achieving diffusion-less junction and Ultrathin 7.5nm Ni mono-germanide

Y.-J. Lee, S.-S. Chuang, C.-I. Liu,

2012

17

Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications

P.-J. Sung, Chun‐Yen Chang, L.-Y. Chen,

2018

15

High performance complementary Ge peaking FinFETs by room temperature neutral beam oxidation for sub-7 nm technology node applications

Y.-J. Lee, T.-C. Hong, Fu-Kuo Hsueh,

2016

13

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