Drain avalanche hot hole injection mode on PMOSFETs

Abstract

Hot carrier degradation was studied for surface-channel (p/sup +/ polysilicon-gate) PMOSFETs in comparison with buried-channel (n/sup +/ polysilicon-gate) PMOSFETs. In the shallow gate bias region, a carrier degradation mode by drain avalanche hot-hole injection was found for the surface-channel PMOSFETs. Here, trapped holes and interface state generation, which were not observed in the buried-channel PMOSFETs, were detected. In the deep-gate-bias region, a channel hot-hole interface-state-generation mode without the threshold voltage shift was found for both types of PMOSFETs studied.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>