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Impact of gate-induced drain leakage current on the tail distribution of DRAM data retention time
71
Citations
5
References
2002
Year
Unknown Venue
Hardware SecurityNon-volatile MemoryElectrical EngineeringTail-mode BitsEngineeringStress-induced Leakage CurrentTail DistributionApplied PhysicsComputer EngineeringGate-induced Drain LeakageMemory DevicesSemiconductor MemoryMicroelectronicsMemory ArchitectureLeakage Mechanism
In this paper we propose a new model for leakage mechanism in tail-mode bits of DRAM data retention characteristics. For main-mode bits, leakage current can be attributed to junction thermal-generation leakage current. For tail-mode bits, it is found for the first time that Gate-Induced Drain Leakage (GIDL) current has a dominant impact. The root cause is electric field enhancement caused by metal precipitates located at the gate-drain overlap region.
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