A new bias scheme for a low power consumption ReRAM crossbar array

Abstract

This paper proposes a new bias scheme for a crossbar array that can improve the power consumption and read margin. The concept of the newly proposed 5/12 bias scheme is to reduce the bias of the unselected cells for power consumption and the bias of half-selected cells for a reduced line voltage drop of the selected cell. In the 5/12 bias scheme, the unselected word line and bit line are biased to 5 × Vapp/12 and 7 × Vapp/12, respectively. The electrical characteristics of the 5/12 bias scheme are evaluated by HSPICE simulations and it is found that appropriate nonlinearity of selector can simultaneously achieve low power consumption and high read margin for 5/12 bias scheme.