Fabrication and electrical characterization of partially metallized vias fabricated by inkjet

Abstract

Through silicon vias (TSVs), acting as vertical interconnections, play an important role in micro-electro-mechanical systems (MEMS) 3D wafer level packaging. Today, taking advantage of nanoparticle inks, inkjet technologies as local filling methods could be used to plate the inside the vias with a conductive material, rather than using a current method, such as chemical vapor deposition or electrolytic growth. This could decrease the processing time, cost and waste material produced. In this work, we have fabricated and demonstrated electrical characterization of TSVs with a top diameter of 85 μm, and partially metallized on their inside walls using silver nanoparticle ink and drop-on-demand inkjet printing. Electrical measurement showed that the resistance of a single via with a void free coverage from top to bottom could be less than 4 Ω, which is still acceptable for MEMS applications.