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Extreme voltage and current overshoots in HV snapback devices during HBM ESD stress
14
Citations
1
References
2008
Year
Unknown Venue
Nominal HbmElectrical EngineeringEngineeringExtreme VoltageHigh Voltage EngineeringTlp Triggering VoltageBias Temperature InstabilitySingle Event EffectsHv Snapback DevicesMicroelectronicsHbm Esd Stress
The turn-on behavior of high voltage ESD devices is studied during HBM ESD stress. Two phenomena are experimentally observed for two different HV processes and several device architectures: a voltage overshoot up to two times of the TLP triggering voltage, and a current overshoot several times the nominal HBM current.
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