2009 · 18 citations · 14 references
EngineeringComputer EngineeringComputer ScienceHardware Description LanguagesHardware-software Co-designSystem-on-chip DesignDesign For TestabilityHardware DebuggingBoundary Scan DebuggingObservabilityObservability AnalysisObservability EnhancementPost-silicon DebuggingScan Chain DebuggingSignalsSilicon Debugging
Bugs are tending to be unavoidable in the design of complex integrated circuits. It is imperative to identify the bugs as soon as possible by post-silicon debug. The main challenge for post-silicon debug is the observability of the internal signals. This paper exploits the fact that it is not necessary to observe the error free states. Then we introduce "suspect window" and present a method for determining its boundary. Based on suspect window, we propose a debug approach to achieve high observability by reusing scan chain. Since scan dumps take place only in suspect window, debug time is greatly reduced. Experiment results demonstrate the effectiveness of the proposed approach.
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Combinational profiles of sequential benchmark circuits
F. Brglez, D. Bryan, Krzysztof Koźmiński · 2003 · 2.1K citations
A reconfigurable design-for-debug infrastructure for SoCs
M. Abramovici, P. Bradley, Kumar Dwarakanath et al. · 2006 · 276 citations