Post-silicon Debugging
Post-Silicon Debugging is a hardware validation methodology that distinguishes itself by identifying and diagnosing functional and electrical defects in integrated circuits after they have been fabricated in silicon, as opposed to relying solely on pre-silicon verification techniques.
110
Publications
3.3K
Citations
302
Authors
63
Institutions
Publications per year
2017–2026
9
Parents
110
Validating the intel pentium 4 microprocessor
Bob Bentley · 2001 · 110 citations
BackSpace: Formal Analysis for Post-Silicon Debug
Flavio M. De Paula, Marcel Gort, Alan J. Hu et al. · 2008 · 91 citations · Full text
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63
Intel (United States)
Santa Clara, United States
16 h-index
115 publications
3.4K citations
University of Florida
Gainesville, United States
13 h-index
32 publications
779 citations
University of Michigan
Ann Arbor, United States
13 h-index
37 publications
1.3K citations
Chinese University of Hong Kong
Hong Kong, Hong Kong
10 h-index
20 publications
666 citations

McMaster University
Hamilton, Canada
9 h-index
19 publications
652 citations
University of Wisconsin–Madison
Madison, United States
6 h-index
13 publications
312 citations
Stanford University
Stanford, United States
6 h-index
14 publications
671 citations
IBM (United States)
Armonk, United States
5 h-index
13 publications
557 citations
1–8 of 63
9 publications · 307 citations
9
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5 publications · 139 citations
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3 publications · 51 citations
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Conference · 2 publications · 66 citations
2
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Conference · 1 publications · 74 citations
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