Characterization of normally-off SiC vertical JFET devices and inverter circuits

Abstract

A latest developed normally-off SiC JFETs has been characterized under static and dynamic operating conditions. Two application oriented inverter circuits were constructed for additional tests under and soft- and hard-switching conditions. The single-phase soft-switching inverter was running at 100 kHz, and the three-phase hard-switching inverter was running at 15 kHz. The unique feature of the inverter operating in synchronous rectification mode has been observed. Without synchronous rectification, the freewheeling diode voltage drop is a fixed voltage plus a resistive voltage. The fixed voltage at zero current is about 1 V for the tested SiC Schottky diodes, and the resistive voltage drop portion is highly dependent on the temperature. With synchronous rectification, the voltage drop is the product of the on-drop resistance and the drain current of the JFET, which can be controlled with the chip area. In the experimental case, the measured voltage drop was 1 V with JFET conducting in reverse direction and 2 V with diode forward conducting. Thus the new generation SiC VJFET device allows high-efficiency inverter operation with reduction of the conduction loss by synchronous rectification and the reduction of switching loss with soft switching.