Two-Pulse $C$–$V$ : A New Method for Characterizing Electron Traps in the Bulk of $ \hbox{SiO}_{2}/\hbox{high-}\kappa$ Dielectric Stacks

Abstract

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <formula formulatype="inline"><tex Notation="TeX">$\hbox{SiO}_{2}/\hbox{high-}\kappa$</tex></formula> dielectric stack is a candidate for replacing the conventional <formula formulatype="inline"><tex Notation="TeX">$\hbox{SiO}_{2}$</tex></formula>-based dielectric stacks for future Flash memory cells. Electron traps in the high-<formula formulatype="inline"><tex Notation="TeX">$ \kappa$</tex></formula> layer can limit the memory retention via the trap-assisted tunneling, and there is a pressing need for their characterization. A new two-pulse <formula formulatype="inline"><tex Notation="TeX">$C$</tex></formula> –<formula formulatype="inline"><tex Notation="TeX">$V$</tex></formula> measurement technique is developed in this letter, which, for the first time, allows us to probe the discharge of electron traps throughout the <formula formulatype="inline"><tex Notation="TeX">$\hbox{SiO}_{2}/\hbox{high-}\kappa$</tex></formula> stack. It complements the charge pumping technique, which can only probe near-interface traps. It is demonstrated that a large number of electron traps, indeed, exist in the bulk of high-<formula formulatype="inline"><tex Notation="TeX">$\kappa$</tex></formula> layer. Bulk electron traps also have different discharge characteristics from those near the <formula formulatype="inline"> <tex Notation="TeX">$\hbox{SiO}_{2}/\hbox{high-}\kappa$</tex></formula> interface. </para>