2005 · 10 citations · 10 references
EngineeringComputer EngineeringComputer ScienceFault ToleranceFault-tolerant ComputingFault-tolerant SystemsBuilt-in Self-testError DetectionFault DetectionHardware Fault ToleranceSelf-checking CircuitsArea Overhead AnalysisError Detection CircuitsFault CoverageFault Coverage AnalysisSelf-checking DesignSelf-checking LogicSoft Error DetectionSoft Errors
In this paper, a new self-checking code-disjoint Booth-2 multiplier with an improved error detection and with a reduced area overhead is proposed. Compared to the 64 times 64 multiplier without error detection the area for the proposed multiplier increases for the different implementations only by 23%-30%. Especially for soft errors the error detection capability is significantly improved. All even or odd (soft) errors in the output registers are detected
10
Fault-secure parity prediction arithmetic operators
M. Nicolaidis, Ricardo O. Duarte, Salvador Manich et al. · IEEE Design & Test of Computers · 1997 · 82 citations