Self-checking Design
Self-Checking Design is a circuit-level methodology in digital system design that belongs to the class of fault-tolerant techniques, distinguished by its ability to concurrently detect internal faults through intrinsic redundancy and built-in error-checking mechanisms without requiring external test equipment.
267
Publications
8.8K
Citations
396
Authors
173
Institutions
Publications per year
2017–2026
16
Parents
267
Design of dynamically checked computers.
William C. Carter, Peter R. Schneider · IFIP Congress · 1968 · 301 citations
1–5 of 267
396
14
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Techniques of Informatics and Microelectronics for Integrated Systems Architecture, France
10 publications · 483 citations
10
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10
h-index
1–5 of 396
173
Techniques of Informatics and Microelectronics for Integrated Systems Architecture
Grenoble, France
18 h-index
43 publications
1.6K citations

University of Bologna
Bologna, Italy
14 h-index
65 publications
1.6K citations
Stanford University
Stanford, United States
12 h-index
22 publications
909 citations
Translational Innovation in Medicine and Complexity
Grenoble, France
10 h-index
15 publications
743 citations
University of Illinois Urbana-Champaign
Urbana, United States
10 h-index
18 publications
873 citations
University of Potsdam
Potsdam, Germany
10 h-index
28 publications
713 citations
Politecnico di Milano
Milan, Italy
9 h-index
32 publications
663 citations
University of Rhode Island
Kingston, United States
8 h-index
12 publications
618 citations
1–8 of 173
50 publications · 2.1K citations
26
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10 publications · 613 citations
10
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8 publications · 366 citations
8
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7 publications · 220 citations
7
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JETTA · 8 publications · 247 citations
7
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