2011 · 29 citations · 2 references
EngineeringDesignElectrical EngineeringComputer ArchitectureDesign AutomationDesign OptimizationCmos Circuit DesignDevice ScalingDigital Integrated Circuit DesignIntegrated Circuit DesignOptimization-based DesignVery-large-scale Integration LayoutCircuit-level OptimizationCmos ScalingCritical LevelsScaling Effects In CmosTechnology Development IntegrationTechnology ScalingTransistor Sizing
The successful scaling of CMOS technology through many generations has carried with it an implicit assumption that the most effective geometries for assembling circuits does not change significantly. As the ability to scale the physical dimensions becomes increasingly difficult in patterning and process, this assumption no longer leads to an optimal solution. This paper reviews a pragmatic process combining the design and technology development disciplines to optimize the technology definition, particularly in the critical levels design rules, as early in the definition process as possible.
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Tejas Jhaveri, Vyacheslav Rovner, Lars W. Liebmann et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2010 · 98 citations
Engineering, Computer Engineering, Electrical Engineering +17