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Integration of Dual Metal Gate CMOS on High-k Dielectrics Utilizing a Metal Wet Etch Process
39
Citations
8
References
2005
Year
Materials ScienceElectrical EngineeringEngineeringNanoelectronicsOxide ElectronicsSurface ScienceApplied PhysicsDevice CharacteristicsIntegration MethodSemiconductor Device FabricationSilicon On InsulatorMicroelectronicsPlasma EtchingHigh-k DielectricsProcess Module DevelopmentInterconnect (Integrated Circuits)Semiconductor Device
The process module development and device characteristics of dual metal gate complementary metal-oxide-semiconductor (CMOS) with TaSiN and Ru gate electrodes on dielectric are reported. Highly selective wet etch processes for various metal gate materials (TaSiN, TiN, and TaN) have been developed with a minimal impact on and HfSiON. A plasma etch process is developed to etch TaSiN and Ru dual metal gate stacks simultaneously on the same wafer. Well behaved dual metal gate CMOS transistors with gate length down to have been demonstrated. This integration method is highly versatile and can be applied to various metal gate materials.
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