SONOS-Type FinFET Device Using P+ Poly-Si Gate and High-k Blocking Dielectric Integrated on Cell Array and GSL/SSL for Multi-Gigabit NAND Flash Memory

S.‐K. Sung, D. Kim, Yun‐Song Lee, S. Kim, D. Park, B.-I. Ryu, Sanghoon Lee, Byung Chul Choi, JinHan Lee, Jeong Dong Choe,

2006 · 20 citations · 1 references

Concepts

Abstract

For the multi-gigabit NAND flash memory, SONOS-type FinFET device with p+ gate and high-k blocking dielectric has been integrated both on the cell array and GSL/SSL for the first time. The advantages of the FinFET structure for the NAND flash application have been theoretically and experimentally demonstrated, and the results show that the 85 % improved on-cell current is achievable using FinFET device. The enhanced programming and retention characteristics of FinFET have been also presented, and modeled by the potential changes on fully-depleted body of the sub-40 nm ultra-narrow fin

References

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