Effects of reliability screens on MOS charge trapping

Abstract

The effects of pre-irradiation elevated-temperature bias stresses on the radiation hardness of field-oxide transistors have been investigated as a function of stress temperature, time, and bias. Both the stress temperature and time are found to have a significant impact on radiation-induced charge buildup in these transistors. Specifically, an increase in either the stress temperature or time causes a much larger negative shift (towards depletion) in the I-V characteristics of the n-channel field-oxide transistors. This increased shift in the transistor I-V characteristics with stress temperature and time suggests that the mechanisms responsible for the stress effects are thermally activated. An activation energy of /spl sim/0.38 eV was measured. The stress bias was found to have no impact on radiation-induced charge buildup in these transistors. The observed stress temperature, time, and bias dependencies appears to be consistent with the diffusion of molecular hydrogen during a given stress period. These results have important implications for the development of hardness assurance test methods.