Networks-on-chip in emerging interconnect paradigms: Advantages and challenges

Luca P. Carloni, Partha Pratim Pande, Yuan Xie

2009 · 176 citations · 59 references

Concepts

TL;DR

Communication is critical for multi‑core SoC performance, and Networks‑on‑Chip have been proposed to simplify design, yet growing demands for energy‑efficiency and speed require new interconnect paradigms beyond traditional planar metal/dielectric structures. This work surveys the opportunities and challenges of three emerging interconnect paradigms—3‑D integration, nanophotonics, and wireless interconnects. The authors outline the opportunities and challenges of these paradigms, providing a comparative analysis of their technical prospects and obstacles.

Abstract

Communication plays a crucial role in the design and performance of multi-core systems-on-chip (SoCs). Networks-on-chip (NoCs) have been proposed as a promising solution to simplify and optimize SoC design. However, it is expected that improving traditional communication technologies and interconnect organizations will not be sufficient to satisfy the demand for energy-efficient and high-performance interconnect fabrics, which continues to grow with each new process generation. Multiple options have been envisioned as compelling alternatives to the existing planar metal/dielectric communication structures. In this paper we outline the opportunities and challenges associated with three emerging interconnect paradigms: three-dimensional (3-D) integration, nanophotonic communication, and wireless interconnects.

References

59